Testable Design and Testing (CAES-TDT)

Testable Design and Testing

Welcome to CAES-TDT, the electrical engineering part of the chair Computer Architecture for Embedded Systems (CAES) of the faculty Electrical Engineering, Mathematics & Computer Science (EEMCS), of the University of Twente in the Netherlands.

All research of TDT (Testable Design and Test of Integrated Systems) is carried out within the CTIT (Centre for Telematics and Information Technology). Our digital nanoelectronics is designed using Europractice design tools and are also realized via Europractice (UMC, TSMC).

Research

The objective of the work within the TDT research group is to guarantee the high quality and dependability of an integrated system while minimizing the exploding costs of verification. This is realized by providing the electronic engineer with advanced strategies. These strategies require sophisticated (on-chip) hardware as well as software. The evaluation of the results in an industrial environment is a precondition for this research.

We define integrated systems as miniature versions of systems consisting of one or more sensors and actuators (e.g. MEMS), including digital control and signal-processing blocks. The embedded software in the digital embedded processors is part of this, too. The actual implementation of the system could be a single System-on-Chip (SoC), or a hybrid such as a System-in-a-Package (SiP).

Example of a high-speed digital multiplier, usable in a Discrete Cosine Transformation (DCT) for MP3 coding realized in CMOS technology.

The core activities within TDT are

Design of digital nanoelectronics in SoC demonstrators for high performance, such as speed, dependability and quality.
Development of generic strategies to accomplish these objectives.
Design of supporting circuits to make these strategies possible.
Development of software tools to support these strategies and circuits.

TDT is involved in projects in the European FP6 Network of Excellence ”PATENT” on Nanosystem Manufacturability.